Memory devices (which are sometimes referred to herein as “memories”) are typically provided as internal, semiconductor, integrated circuits in computers or other electronic systems. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of a charge storage structure, such as floating gates or trapping layers or other physical phenomena, determine the data state of each cell. Common electronic systems that utilize flash memory devices include, but are not limited to, personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a string of memory cells is coupled in parallel with each memory cell coupled to a data line, such as those typically referred to as digit (e.g., bit) lines. In NAND flash architecture, a string of memory cells is coupled in series with only the first memory cell of the string coupled to a bit line.
As the performance and complexity of electronic systems increase, the requirement for additional memory in a system also increases. However, in order to continue to reduce the costs of the system, the parts count must be kept to a minimum. This can be accomplished by increasing the memory density of an integrated circuit by using such technologies as multilevel cells (MLC). For example, MLC NAND flash memory is a very cost effective non-volatile memory.
Typically, an array of memory cells for NAND flash memory devices is arranged such that the control gate of each memory cell of a row of the array is connected together to form an access line, such as a word line. Columns of the array include strings (often termed NAND strings) of memory cells connected together in series between a pair of select devices, e.g., a source select transistor and a drain select transistor. Each source select transistor is connected to a source, while each drain select transistor is connected to a data line, such as column bit line. A “column” refers to a group of memory cells that are commonly coupled to a local data line, such as a local bit line. It does not require any particular orientation or linear relationship, but instead refers to the logical relationship between memory cell and data line.
To meet the demand for even higher capacity memories, designers continue to strive for increasing memory density, i.e., the number of memory cells for a given area of an integrated circuit die. One way to increase the density of memory devices is to form stacked memory arrays, e.g., often referred to as three-dimensional memory arrays. For example, one type of three-dimensional memory array may include stacked memory cells, e.g., substantially vertical strings of series coupled memory cells, such as substantially vertical NAND strings, corresponding to pillars, such as substantially vertical semiconductor pillars. For example, the memory cells at a common location (e.g., at a common vertical elevation) in the strings may form a tier of memory cells that may be commonly coupled to a common control gate. When many memory cells in a string are programmed to high threshold voltages, inhibiting programming of memory cells corresponding to the pillar during a programming operation can become difficult.
For the reasons stated above and for other reasons that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for boosting inhibit efficiency in memories.